Autoren: Carver Mead, Lynn Conway
Titel: Introduction to VLSI systems
Verlag: Addison-Wesley
Jahr: 1980 (2. Auflage)
ISBN: 0-201-04358-0
396 Seiten, viele Abbildungen, 16 Farbtafeln
Was steht drin:
Dies ist das erste öffentlich zugängliche Lehrbuch über Entwurf und Bau hochintegrierter Schaltungen (VLSI).
Es behandelt alle Ebenen von der Transistorphysik über die Herstellung von Wafern bis zum Entwurf paralleler Systemen.
"VLSI" bedeutete 1980: Chips mit ca. 20000 Transistoren.
Chip design beruhte zu dieser Zeit auf privatem (und vertraulichem) Wissen der Halbleiterhersteller.
Durch Erscheinen dieses Lehrbuchs konnten an den Universitäten mehr Ingenieure ausgebildet werden, die Entwicklung von komplexen VLSI chips nahm daraufhin sprunghaft zu.
Es wird daher auch von der "Mead & Conway Revolution" gesprochen.
Wie soviele andere Entwicklungen fand auch diese "Revolution" am XEROX PARC statt.
Warum man es lesen sollte:
Man muss (und kann) es eigentlich nicht "lesen", dazu ist der Text zu dicht geschrieben.
Aber schon ein Blick ins Inhaltsverzeichnis macht einem klar, auf was man beim Entwurf von integrierten Schaltungen alles achten muss, dieses Buch fördert wirklich den Respekt vor den "chips".
Das Buch ist als historisches Artefakt zu betrachten, es kann gut zusammen mit Wafer-Scheiben in eine "Geschichte der Halbleiter"-Vitrine gestellt werden.
Inhalt:
1 MOS DEVICES AND CIRCUITS
1.1 The MOS transistor
1.2 The basic inverter
1.3 Inverter delay
1.4 Parasitic effects
1.5 Driving large capacitive loads
1.6 Space versus time
1.7 Basic NAND and NOR logic circuits
1.8 Super buffers
1.9 A closer look at the electrical parameters
1.10 Depletion mode pull-ups versus enhancement mode pull-ups
1.11 Delays in another form of logic circuitry
1.12 Pull-up/pull-down ratios for inverting logic coupled by pass transistors
1.13 Transit times and clock periods
1.14 Properties of cross-coupled circuits
1.15 A fluid model for visualizing MOS transistor behavior
1.16 Effects of scaling down the dimensions of MOS circuits and systems
2 INTEGRATED SYSTEM FABRICATION
2.1 Patterning
2.2 Scaling of patterning technology
2.3 The silicon gate n-channel MOS process
2.4 Meld statistics
2.5 Scaling of the processing technology
2.6 Design rules
2.7 Electrical parameters
2.8 Current limitations in conductors
2.9 A closer look at some details
2.10 Choice of technology
3 DATA AND CONTROL FLOW IN SYSTEMATIC STRUCTURES
3.1 Introduction
3.2 Notation
3.3 Two-phase clocks
3.4 The shift register
3.5 Relating different levels of abstraction
3.6 Implementing dynamic registers
3.7 Designing a subsystem
3.8 Register-to-register transfer
3.9 Combinational logic
3.10 The programmable logic array
3.11 Finite-state machines
3.12 Toward a structured design methodology
4 IMPLEMENTING INTEGRATED SYSTEM DESIGNS: FROM CIRCUIT TOPOLOGY TO PATTERNING GEOMETRY TO WAFER FABRICATION
4.1 Introduction
4.2 Patterning and fabrication
4.3 Hand layout and digitization using a symbolic layout language
4.4 An interactive layout system
4.5 The Caltech Intermediate Form for LSI layout description
4.6 The multiproject chip
4.7 Patterning and fabrication in the future
5 OVERVIEW OF AN LSI COMPUTER SYSTEM, AND THE DESIGN OF THE 0M2 DATA PATH CHIP
5.1 Introduction
5.2 The OM project at Caltech
5.3 System overview
5.4 The overall structure of the data path
5.5 The arithmetic logic unit
5.6 ALU registers
5.7 Buses
5.8 Barrel shifter
5.9 Register array
5.10 Communication with the outside world
5.11 Encoding the control operation of the data path
5.12 Functional specification of the OM2 data path chip
Appendix
6 ARCHITECTURE AND DESIGN OF SYSTEM CONTROLLERS, AND THE DESIGN OF THE OM2 CONTROLLER CHIP
6.1 Introduction
6.2 Alternative control structures
6.3 The stored-program machine
6.4 Microprogrammed control
6.5 Design of the OM2 controller chip
6.6 Examples of controller operation
6.7 Some reflections on the classical stored-program machine
7 SYSTEM TIMING
7.1 The third dimension
7.2 Synchronous systems
7.3 Clock distribution
7.4 Clock generation
7.5 Synchronization failure
7.6 Self-timed systems
7.7 Self-timed signaling
7.8 Self-timed elements
8 HIGHLY CONCURRENT SYSTEMS
8.1 Introduction
8.2 Communication and concurrency in conventional computers
8.3 Algorithms for VLSI processor arrays
8.4 Hierarchically organized machines
8.5 Highly concurrent structures with global communication
8.6 Challenges for the future
9 PHYSICS OF COMPUTATIONAL SYSTEMS
9.1 Digital systems
9.2 Voltage limit
9.3 Discreteness of charge
9.4 Transitions in quantum mechanical systems
9.5 Irreversibility
9.6 Memory
9.7 Thermal limit
9.8 Quantum limits
9.9 Two technologies - An example
9.10 Complexity of computation
9.11 Entropic view of computation
9.12 Conclusion
Further Suggested Reading
Approximate Values of Physical Constants
Index